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MMBF5460LT1 JFET - General Purpose Transistor
P-Channel
Features http://onsemi.com
2 SOURCE
* Pb-Free Package is Available
MAXIMUM RATINGS
Rating Drain-Gate Voltage Reverse Gate-Source Voltage Forward Gate Current Symbol VDG VGSR IGF Value 40 40 10 Unit Vdc Vdc mAdc 1 DRAIN 3 GATE
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation FR-5 Board, (Note 1) TA = 25C Derate above 25C Thermal Resistance, Junction-to-Ambient Junction and Storage Temperature Symbol PD 225 1.8 RqJA TJ, Tstg 556 -55 to +150 mW mW/C C/W C SOT-23 (TO-236) CASE 318 STYLE 10 Max Unit 1 2 3
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR-5 = 1.0 x 0.75 x 0.062 in.
MARKING DIAGRAM
M6E M G G 1
M6E = Device Code M = Date Code* G = Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation and/or overbar may vary depending upon manufacturing location.
ORDERING INFORMATION
Device MMBF5460LT1 MMBF5460LT1G Package SOT-23 Shipping 3,000 / Tape & Reel
SOT-23 3,000 / Tape & Reel (Pb-Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2006
1
February, 2006 - Rev. 2
Publication Order Number: MMBF5460LT1/D
MMBF5460LT1
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Gate-Source Breakdown Voltage (IG = 10 mAdc, VDS = 0) Gate Reverse Current (VGS = 20 Vdc, VDS = 0) (VGS = 20 Vdc, VDS = 0, TA = 100C) Gate Source Cutoff Voltage (VDS = 15 Vdc, ID = 1.0 mAdc) Gate Source Voltage (VDS = 15 Vdc, ID = 0.1 mAdc) ON CHARACTERISTICS Zero-Gate-Voltage Drain Current (VDS = 15 Vdc, VGS = 0) SMALL-SIGNAL CHARACTERISTICS Forward Transfer Admittance (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) Output Admittance (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) Input Capacitance (VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Reverse Transfer Capacitance (VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) |Yfs| |yos| Ciss Crss 1000 - - - - - 5.0 1.0 4000 75 7.0 2.0 mmhos mmhos pF pF IDSS -1.0 - -5.0 mAdc V(BR)GSS IGSS - - VGS(off) VGS 0.75 0.5 - - - - 5.0 1.0 6.0 4.0 nAdc mAdc Vdc Vdc 40 - - Vdc Symbol Min Typ Max Unit
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MMBF5460LT1
DRAIN CURRENT versus GATE SOURCE VOLTAGE
4.0 3.5 I D, DRAIN CURRENT (mA) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VGS, GATE-SOURCE VOLTAGE (VOLTS) 1.8 2.0 TA = -55C 25C 125C Yfs FORWARD TRANSFER ADMITTANCE m mhos) ( VDS = 15 V 4000 3000 2000
FORWARD TRANSFER ADMITTANCE versus DRAIN CURRENT
1000 700 500 300 200 0.2 0.3 1.0 0.5 0.7 ID, DRAIN CURRENT (mA) VDS = 15 V f = 1.0 kHz 2.0 3.0 4.0
Figure 1. VGS(off) = 2.0 Volts
Yfs FORWARD TRANSFER ADMITTANCE m mhos) (
Figure 4. VGS(off) = 2.0 Volts
10 9.0 I D, DRAIN CURRENT (mA) 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 VGS, GATE-SOURCE VOLTAGE (VOLTS) 3.5 4.0 TA = -55C 25C 125C VDS = 15 V
10000 7000 5000 3000 2000
1000 700 500 0.5 0.7 1.0 2.0 3.0 ID, DRAIN CURRENT (mA) 5.0 VDS = 15 V f = 1.0 kHz 7.0
Figure 2. VGS(off) = 4.0 Volts
Yfs FORWARD TRANSFER ADMITTANCE m mhos) (
Figure 5. VGS(off) = 4.0 Volts
16 14 I D, DRAIN CURRENT (mA) 12 10 8.0 6.0 4.0 2.0 0 0 1.0 TA = -55C 25C 125C
VDS = 15 V
10000 7000 5000 3000 2000
1000 700 500 0.5 0.7 1.0 2.0 3.0 ID, DRAIN CURRENT (mA) VDS = 15 V f = 1.0 kHz 5.0 7.0 10
2.0 3.0 4.0 5.0 6.0 VGS, GATE-SOURCE VOLTAGE (VOLTS)
7.0
8.0
Figure 3. VGS(off) = 5.0 Volts
Figure 6. VGS(off) = 5.0 Volts
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MMBF5460LT1
1000 700 500 300 200 100 70 50 30 20 10 0.1 0.2 0.5 1.0 2.0 ID, DRAIN CURRENT (mA) 5.0 10 6.0 mA 10 mA IDSS = 3.0 mA 10 VDS = 15 V f = 1.0 kHz C, CAPACITANCE (pF) 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 Coss Crss 10 20 30 VDS, DRAIN-SOURCE VOLTAGE (VOLTS) 40 Ciss f = 1.0 MHz VGS = 0
r oss , OUTPUT RESISTANCE (k ohms)
Figure 7. Output Resistance versus Drain Current
Figure 8. Capacitance versus Drain-Source Voltage
10 9.0 NF, NOISE FIGURE (dB) 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 1.0 10 100 1000 RS, SOURCE RESISTANCE (k Ohms) 10,000 VDS = 15 V VGS = 0 f = 100 Hz
Figure 9. Noise Figure versus Source Resistance
vi Crss Ciss ross Coss | yfs | vi
COMMON SOURCE y PARAMETERS FOR FREQUENCIES BELOW 30 MHz yis = jW Ciss yos = jW Cosp * + 1/ross yfs = yfs | yrs = -jW Crss
*Cosp is Coss in parallel with Series Combination of Ciss and Crss.
NOTE: 1. Graphical data is presented for dc conditions. Tabular data is given for pulsed conditions (Pulse Width = 630 ms, Duty Cycle = 10%).
Figure 10. Equivalent Low Frequency Circuit
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MMBF5460LT1
PACKAGE DIMENSIONS
SOT-23 (TO-236) CASE 318-08 ISSUE AN
D
3 SEE VIEW C
E
1 2
HE c b e q 0.25
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318-01 THRU -07 AND -09 OBSOLETE, NEW STANDARD 318-08. MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.13 0.18 2.90 3.04 1.30 1.40 1.90 2.04 0.20 0.30 0.54 0.69 2.40 2.64 INCHES NOM 0.040 0.002 0.018 0.005 0.114 0.051 0.075 0.008 0.021 0.094
A L A1 L1 VIEW C
DIM A A1 b c D E e L L1 HE
MIN 0.89 0.01 0.37 0.09 2.80 1.20 1.78 0.10 0.35 2.10
MIN 0.035 0.001 0.015 0.003 0.110 0.047 0.070 0.004 0.014 0.083
MAX 0.044 0.004 0.020 0.007 0.120 0.055 0.081 0.012 0.029 0.104
STYLE 10: PIN 1. DRAIN 2. SOURCE 3. GATE
SOLDERING FOOTPRINT*
0.95 0.037 0.95 0.037
2.0 0.079 0.9 0.035
SCALE 10:1
0.8 0.031
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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MMBF5460LT1/D

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